The FD8R is a highly horizontally integrated, Dual Speed Hub with internal 2-port

switch/bridge and embedded buffer memory. It supports 16, 8 or 4+1 10/100M Auto sensing RMII

(Reduced Media Independent Interface) + MII ports to connect to PHYceiver directly. FD8R also support stack/ cascade bus, the implementation of high-port count architecture become easily. Totally 1K MAC addresses filtering is supported. FD16R/8R/5R can make the forwarding decision in a short time with the internal two-port switch. The FD16R / FD8R / FD5R is with a 128K bits

embedded SRAM. FD8R makes an implementation of cost-effective 10/100 Dual Speed Hub with a commercial available 10/100 Auto-Negotiation / Sensing PHYceivers easily.

FD8R changes to either Master mode with internal bridge or slave mode without internal bridge

automatically depends on the stack configuration.

·  IEEE802.3 (2000 Edition) compliant

·  F3 Stacka Bus (patent pending) provides dual stack bus of 10M and 100M bus each

·  Daisy Chain Master / Slave Auto enable/disable

·  Support up to 1K MAC addresses

·  Support Aging function

·  Support high-efficiency 128Kb packet buffer

·  Support RMII & MII interface to connect to PHY ceiver directly

·  Support Half-duplex mode on any ports

·  Optional Back-Pressure Flow Control

·  Rich-function LED interface

·  50 MHz operation, +3.3V Power, Low Power CMOS technology

·  208 PQFP (FD16R), or 128 PQFP (FD8R, FD5R)

Datasheet download V2.0

Application V2.0