¡P IEEE802.3 (1998 Edition)
compliant
¡P Eight 10BASE-T transceivers included in
one single chip.
¡P On-chip FIFO, PLL, Manchester
encoder/decoder
¡P Automatic detection and correction
¡P Automatic partitioning of faulty ports
¡P Rich-function LED drivers support for
per port link/ receive, partition, global Jabber,
collision status and high priority port
utilization.
¡P Embedded pre-distortion resistor for
every TP port
¡P Support to transceiver data with F3¡¦s
FY8 on standard CAT5 UTP cable over 300 meters.
( F3 patent pending )
¡P F3 proprietary high priority frame
control. ( F3 patent pending )
¡P Low Power CMOS technology with a single
+5V supply
¡P 44-pin,
100-pin QFP
¡@
Datasheet download V2.0
Application V2.0
¡@