FMYF2 is a highly integrated CO/CPE MC (Media Converter). The FMYF2 is designed specifically for frame-based OAM that satisfies 5 ways of loop-back tests.

The FMYF2 integrates one 10/100Base-TX and one 100Base-FX transceivers. Both have embedded packet memory, a switch controller and OAM (Operation, Administration, and Maintenance)   control logic into a single CMOS integrated circuit. It may connect to an O/E module or a transformer.

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The FMYF2 provides 10/100 auto-negotiation capability for 10/100Base-TX ports. Only 10/100Base-TX port could support Full-Duplex and Half-Duplex modes. In half-duplex mode, the controller supports back-pressure congestion control to avoid packet loss during a long burst of traffic. In full-duplex mode of operation, The FMYF2 supports symmetric IEEE802.3x flow control. With hardware switching engine, The FMYF2 can switch at Full-Duplex wire rate. Totally 1K MAC addresses filtering and aging function are supported.

¡P     IEEE802.3 compliant. Auto-negotiation or flow control, duplex modes and speeds.

¡P     TTC TS-1000 (first edition) compliant.

¡P     Support frame-based OAM.

¡P     Auto-trap frame report if power is lower than the adjustable threshold.

¡P     CO or CPE MC controller select pin.

¡P     Wire speed Store-and-Forward switching with low switching latency.

¡P¡P     Supports up to 1K unicast MAC addresses and unlimited number of broadcast addresses.

      Uses 2-layer hashing table with 1 hashing algorithms, aging time is set to 300sec

¡P     16K Bytes Packet Buffer per Port.

¡P     Supports 2047 Bytes of maximum frame size.

¡P     Switching at wire rate.

¡P     Supports Half & Full Duplex Operation.

¡P     Optional Back-Pressure Flow Control for half-duplex operation.

¡P     Optional IEEE 802.3x Flow Control for full-duplex operation.

¡P     Support to transceive data (10Mb/s) on standard CAT5 UTP cable over 300 meters. (F3 patent)

¡P     Support Far End Fault enable function consistent with IEEE802.3 standard.

¡P   Single 50 MHz operation, 3.3V/2.5V dual power, low power 0.25u CMOS technology.

 ¡P     128pins PQFP package.

Datasheet download V1.0

Application Note V1.0

Application V1.0
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