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FS16R is the first 128-pin full
feature 16-port switch controller with embedded packet memory. FS16R has 16
dual-speed RMII ports with full auto-negotiation capability. Maximum switching
bandwidth of FS16R is 3.2 Gbps, hence
it is able to forward up to 2.3 million packet per second and to achieve
wire-speed forwarding on every port for concurrent and independent traffic
streams. FS16R is simple but flexible. For example, it can easy and direct
connect the RMII interface to form a 24 ports Fast Ethernet switch. In order to
assist customers to differentiate their system level products, it has many
features configurable through optional EEPROM. In half-duplex mode, the
controller supports back-pressure congestion control to avoid packet loss during
a long burst of traffic. In full-duplex mode of operation, the device supports
symmetric IEEE 802.3x frame-based flow control. FS16R has an internal packet
buffer memory of 2 Megabits in size and an address database memory that may hold
up to 4K unicast addresses. Moreover, FS16R supports extensive port trunking
features for better flexibility in various network configurations. FS16R
can be configured as 15 port-base VLANs which port 15 join to any other port
(port 0 to port14).
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IEEE Std. 802.3 (¡¦98) compliant. Auto-negotiation or flow
control, duplex modes and speeds.
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FS16R supports 16 10/100
Mbps Ethernet ports(RMII).
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Utilize fully non-blocking shared memory architecture using 2
Mb embedded synchronous SRAM and
flexible buffer management scheme.
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Wire-speed store-and-forward switching with low switching
latency. Automatic address learning,local
frames filtering,
and adjustable aging.
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Full-duplex IEEE 802.3x flow
control and half-duplex back-pressure with intelligent port-based
congestion detection and
broadcast rate control.
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2 chips easy for 24 port solution
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Supports up to 4K unicast MAC
addresses and unlimited number of broadcast addresses. Uses
4-layer hashing table with 2
hashing algorithms.
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Supports 4 trunking groups of up to 4 ports each. Supports
dynamic load sharing and fault tolerant.
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Patent pending automatic trunking group formation to
facilitate installation.
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Effective full-duplex rate-based loop detection.
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Support 15 port-base VLANs.
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Single 50MHz clock source, 0.25 micron, 2.5V low power CMOS
technology (3.3V I/O).
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128 PQFP or 208 PQFP
Datasheet download V1.0
Application V2.0
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