FSG4M is a full feature 4-port switching fabric with an embedded packet memory. FSG4M has 4 triple speed GMII interfaces of 10/100/1000 Mbps, or Ten Bit Interface (TBI) interfaces plus 1 General Purpose I/O (GPIO) interface for a WEB management.

The maximum switching bandwidth of FSG4M is 8.2 Gbps, hence it is able to forward up to 6 million packets per second and to achieve wire-speed forwarding on every port for concurrent and independent traffic streams.  FSG4M is simple but flexible.  In order to assist customers to differentiate their system level products, it has many configurable and monitoring features through out-of-band terminal emulation software or in-band WEB browser.

For COS, QOS, and traffic control, FSG4M supports traffic differentiated service, port-based priority service and flow control service. In traffic differentiated service, FSG4M recognize incoming frames from 802.1Q priority tagging , IP precedence, and TCP/UDP well know port number such as WWW, E-mail, FTP, and Telnet etc. and expedite it to one of  4 priority queues of egress port. In port-based priority service, some of ports get higher priority service for voice, video, and multimedia applications.  

In half-duplex flow control service, FSG4M supports back-pressure congestion control to avoid packet loss during a long burst of traffic.

In full-duplex flow control service, FSG4M supports symmetric IEEE 802.3x frame-based flow control. Note that FSG4M only supports full-duplex mode in the speed of 1000 Mbps. FSG4M has an internal packet buffer memory of 768 Kbits in size and an address database memory that may hold up to 8K unicast addresses. 

Moreover, FSG4M supports extensive port trunking and port-base VLAN features for better flexibility in various network configurations.

¡P  IEEE Std. 802.3 (year 2000) compliant.

¡P  FSG4M supports 4 10/100/1000 Mbps GMII/TBI interfaces plus 1 GPIO interface.

¡P  Utilize fully non-blocking shared memory architecture using 768 Kbits embedded SSRAM and

    flexible buffer management scheme.

¡P  Wire-speed store-and-forward switching with low switching latency. Automatic address learning,

     local frames filtering, and aging.

¡P  Full-duplex IEEE 802.3x flow control and half-duplex back-pressure with intelligent port-based

    congestion detection and broadcast rate control.

¡P  Supports up to 8K unicast MAC addresses and unlimited number of broadcast addresses. Uses

    4-layer hashing table with 2 hashing algorithms.

¡P  Supports 2 trunking groups of up to 4 ports each.  Supports dynamic load sharing and fault tolerant.

¡P  Patent pending automatic trunking group formation to facilitate installation.

¡P  Effective full-duplex rate-based loop detection.

¡P  Supports port-based VLAN with 4 VLAN IDs.

¡P  Supports IEEE 802.1Q priority tagging, IP precedence, and TCP/UDP well known port number

     priority services with 4 levels of COS plus port-based priority service.

¡P  Supports both type and length encapsulation (Ethernet II and RFC 1042)

¡P  Supports Jumbo frame of up to 9K bytes

¡P  Supports broadcast storm prevention function

¡P  Supports General Purpose IO I/F for in-band web management and monitoring.

¡P  Dual 125MHz / 75MHz clock source, 0.18 micron, and 1.8V low power CMOS technology (3.3V

    tolerant I/O) with high fault coverage DFT inside.

¡P  208 pins PQFP.

Datasheet download V1.0

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