¡P IEEE
Std. 802.3 (year 2000) compliant.
¡P
FSG5/8
supports 5/8 10/100/1000 Mbps GMII/MII interfaces.
¡P Utilize
fully non-blocking shared memory architecture using 768Kbits embedded
SSRAM and flexible buffer management scheme.
¡P
Wire-speed
store-and-forward switching with low switching latency. Automatic address
learning and aging, local frames filtering.
¡P
Full-duplex
IEEE 802.3x flow control and half-duplex back-pressure with intelligent
port-based congestion detection and broadcast rate control.
¡P
Supports
up to 8K unicast MAC addresses and unlimited number of broadcast
addresses. Uses 4-layer hashing table.
¡P Supports
broadcast storm prevention function.
¡P Supports
Jumbo Frame of up to 9K bytes.
¡P Dual
125MHz / 75MHz clock source, 0.18 micron, and 1.8V low power CMOS technology
(3.3V tolerant I/O) with high fault coverage DFT inside.
¡P 208
pins PQFP.
Datasheet download V1.0
Application
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